Carte Semiconductor Memory Testing Anuj Gupta

Semiconductor Memory Testing

Fault Models and Test Considerations for High Performance Embedded SRAM's

Autor: Anuj Gupta
Limbă: engleză
Legare: Carte broșată
Disponibilitate: La editor doar la comandă
Expediem în 17-27 zile
254.63 lei
Stringent test quality requirements, at-speed test limitations & total cost associated with using ex...

Informații despre carte

Autor
Limbă
engleză
Legare
Carte - Carte broșată
Publicat
2009
Pagini
64
EAN
9783639194401
Enbook ID
06827526
Greutate
114
Dimensiuni
151 x 4 x 10

Descriere completă

Stringent test quality requirements, at-speed test limitations & total cost associated with using expensive off-chip testers for embedded memory testing have forced system designers to introduce on-chip Memory Built-in Self Test (MBIST) techniques to generate, apply, read and compares test patterns in order to expose subtle defects of SRAM''s. The book discusses in detail the various fault models and test requirements associated with embedded SRAM s in today s System-On-Chip s and focuses on the implementation of testing algorithms for embedded SRAMs in the MBIST engine. The book also discusses a finding where failure analysis and silicon debug required an update to the algorithms and pattern backgrounds implemented in the MBIST.

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