Carte Parallel Processing on VLSI Arrays Josef A. Nossek

Parallel Processing on VLSI Arrays

Limbă: engleză
Legare: Copertă tare
Editura: Springer
Disponibilitate: În depozitul extern în cantități mici
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Guest Editor: JOSEF A. NOSSEK This is a special issue of the Journal of VLSI Signal Processing compr...

Informații despre carte

Limbă
engleză
Legare
Carte - Copertă tare
Publicat
1991
Pagini
140
EAN
9780792392002
ISBN
9780792392002
Enbook ID
07408035
Editura
Greutate
595
Dimensiuni
210 x 279 x 13

Descriere completă

Guest Editor: JOSEF A. NOSSEK This is a special issue of the Journal of VLSI Signal Processing comprising eight contributions invited for publica­ tion on the basis of novel work presented in a special session on "Parallel Processing on VLSI Arrays" at the International Symposium on Circuits and Systems (ISCAS) held in New Orleans in May 1990. Massive parallelism to cope with high-speed requirements stemming from real-time applications and the restrictions in architectural and circuit design, such as regularity and local connectedness, brought about by the VLSI technology are the key questions addressed in these eight papers. They can be grouped into three subsections elaborating on: • Simulation of continuous physical systems, i. e. , numerically solving partial differential equations. • Neural architectures for image processing and pattern recognition. • Systolic architectures for implementing regular and irregular algorithms in VLSI technology. The paper by A. Fettweis and O. Nitsche advocates a signal processing approach for the numerical integration of partial differential equations (PD Es). It is based on the principles of multidimensional wave digital filters (MDWDFs) thereby preserving the passivity of energy dissipating physical systems. It is particularly suited for systems ofPDEs involving time and finite propagation speed. The basic ideas are explained using Maxwell's equa­ tions as a vehicle for the derivation of a multidimensional equivalent circuit representing the spatially infinitely extended arrangement with only very few circuit elements.

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