Matrix Computations on Systolic-Type Arrays

Name: Matrix Computations on Systolic-Type Arrays
Brand: Springer
SKU: 9780792392378
Price: 889.75 RON
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Autor: Jaime Moreno, Tomas Lang

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Editura: Springer

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Matrix Computations on Systolic-Type Arrays provides a framework which permits a good understanding...

Informații despre carte

Autor

Jaime Moreno, Tomas Lang

Limbă

engleză

Legare

Carte - Copertă tare

Publicat

1992

Pagini

280

EAN

9780792392378

ISBN

079239237X

Enbook ID

01398126

Editura

Springer

Greutate

1360

Dimensiuni

155 x 235 x 20

Descriere completă

Matrix Computations on Systolic-Type Arrays provides a framework which permits a good understanding of the features and limitations of processor arrays for matrix algorithms. It describes the tradeoffs among the characteristics of these systems, such as internal storage and communication bandwidth, and the impact on overall performance and cost. A system which allows for the analysis of methods for the design/mapping of matrix algorithms is also presented. This method identifies stages in the design/mapping process and the capabilities required at each stage. Matrix Computations on Systolic-Type Arrays provides a much needed description of the area of processor arrays for matrix algorithms and of the methods used to derive those arrays. The ideas developed here reduce the space of solutions in the design/mapping process by establishing clear criteria to select among possible options as well as by a-priori rejection of alternatives which are not adequate (but which are considered in other approaches). The end result is a method which is more specific than other techniques previously available (suitable for a class of matrix algorithms) but which is more systematic, better defined and more effective in reaching the desired objectives. Matrix Computations on Systolic-Type Arrays will interest researchers and professionals who are looking for systematic mechanisms to implement matrix algorithms either as algorithm-specific structures or using specialized architectures. It provides tools that simplify the design/mapping process without introducing degradation, and that permit tradeoffs between performance/cost measures selected by the designer.

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