Hardware Implementation of AES Encryption and Decryption

Name: Hardware Implementation of AES Encryption and Decryption
Brand: LAP Lambert Academic Publishing
SKU: 9783659928833
Price: 239.7 RON
Availability: InStock

Autor: Mohamed Abd El Ghany, Mazen Al-Maraghi

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Editura: LAP Lambert Academic Publishing

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Nowadays cryptography has a main role in embedded systems design. As the number of devices and appli...

Informații despre carte

Autor

Mohamed Abd El Ghany, Mazen Al-Maraghi

Limbă

engleză

Legare

Carte - Carte broșată

Publicat

2016

Pagini

EAN

9783659928833

ISBN

3659928836

Enbook ID

14167525

Editura

LAP Lambert Academic Publishing

Greutate

147

Dimensiuni

150 x 220 x 5

Descriere completă

Nowadays cryptography has a main role in embedded systems design. As the number of devices and applications which send and receive data are increasing rapidly, the data transfer rates are becoming higher. In many applications, this data requires a secured connection which is usually achieved by cryptography. Advanced Encryption Standard (AES) is an approved cryptographic algorithm that can be used to protect electronic data. The AES can be programmed in software or built with pure hardware. This work presents the AES algorithm and its FPGA implementation. Implementation of the synthesizable and simulation of the VHDL code is carried out on Xilinx - Project Navigator, ISE 13.2i suite. All the transformations of both Encryption and Decryption are simulated using an iterative design approach in order to minimize the hardware consumption. This work proposes two new architectures for software and hardware implementations. For the software, a new JAVA application is implemented to provide the user with maximum ease and efficiency in dealing with AES and hardware integration for the AES encryption and decryption algorithm.

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Hardware Implementation of AES Encryption and Decryption

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