Hardware for Soft Computing and Soft Computing for Hardware

Name: Hardware for Soft Computing and Soft Computing for Hardware
Brand: Springer International Publishing AG
SKU: 9783319031095
Price: 553.26 RON
Availability: InStock

Autor: Nadia Nedjah, Luiza de Macedo Mourelle

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Legare: Copertă tare

Editura: Springer International Publishing AG

Disponibilitate: În depozitul extern

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553.26 lei

Single and Multi-Objective Evolutionary Computation (MOEA), Genetic Algorithms (GAs), Artificial Neu...

Informații despre carte

Autor

Nadia Nedjah, Luiza de Macedo Mourelle

Limbă

engleză

Legare

Carte - Copertă tare

Publicat

2013

Pagini

198

EAN

9783319031095

ISBN

3319031090

Enbook ID

02152560

Editura

Springer International Publishing AG

Greutate

4439

Dimensiuni

155 x 235 x 19

Descriere completă

Single and Multi-Objective Evolutionary Computation (MOEA), Genetic Algorithms (GAs), Artificial Neural Networks (ANNs), Fuzzy Controllers (FCs), Particle Swarm Optimization (PSO) and Ant colony Optimization (ACO) are becoming omnipresent in almost every intelligent system design. Unfortunately, the application of the majority of these techniques is complex and so requires a huge computational effort to yield useful and practical results. Therefore, dedicated hardware for evolutionary, neural and fuzzy computation is a key issue for designers. With the spread of reconfigurable hardware such as FPGAs, digital as well as analog hardware implementations of such computation become cost-effective. The idea behind this book is to offer a variety of hardware designs for soft computing techniques that can be embedded in any final product. Also, to introduce the successful application of soft computing technique to solve many hard problems encountered during the design of embedded hardware designs. Reconfigurable embedded designs for GAs, ANNs, FCs and PSO are presented and evaluated. Also, the application of quantum-based evolutionary computation and multi-objective evolutionary computation as well as ACO are applied to solve hard problems related to circuit synthesis, IP assignment, mapping and routing of applications on Network-On-Chip infrastructures.§

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