Carte Generating Code from Abstract VHDL Models - Basics, Semantics, Algorithms Mohamed Abdel Maksoud

Generating Code from Abstract VHDL Models - Basics, Semantics, Algorithms

Limbă: engleză
Legare: Carte broșată
Disponibilitate: În depozitul extern
Expediem în 9-15 zile
274.52 lei
Static methods are very successful in deriving crucial properties (e.g. timing behaviour) of safety...

Informații despre carte

Limbă
engleză
Legare
Carte - Carte broșată
Publicat
2008
Pagini
108
EAN
9783639024685
ISBN
3639024680
Enbook ID
06812272
Greutate
154
Dimensiuni
152 x 229 x 6

Descriere completă

Static methods are very successful in deriving crucial properties (e.g. timing behaviour) of safety critical systems. Some information in the analysed program are not available either because they cannot be determined statically or because they were intentionally sacrificed (i.e. abstracted) to make program analysis tractable. These abstractions make program simulation nondeterministic. This book describes the algorithms and semantics developed and used in building an abstraction-aware compiler thatderives/generates pipeline analysis from an abstracted VHDL specification of the target microprocessor. This analysis is used in a commercial tool frame for deriving upper bound over executiontime of critical tasks. This book is useful for computer scientists and engineers concerned with computing timing analyses based on VHDL specification of the target hardware.

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