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Carte Digital Logic Design Using Verilog Vaibbhav Taraate

Digital Logic Design Using Verilog

Coding and RTL Synthesis

Autor: Vaibbhav Taraate
Limbă: engleză
Legare: Carte broșată
Editura: Springer, India, Private Ltd
Disponibilitate: În depozitul extern
Expediem în 8-11 zile
715.09 lei
This book is designed to serve as a hands-on professional reference with additional utility as a tex...

Informații despre carte

Autor
Vaibbhav Taraate
Limbă
engleză
Legare
Carte - Carte broșată
Publicat
2018
Pagini
416
EAN
9788132238386
Enbook ID
20094987
Editura
Springer, India, Private Ltd
Greutate
743
Dimensiuni
155 x 20 x 23

Descriere completă

This book is designed to serve as a hands-on professional reference with additional utility as a textbook for upper undergraduate and some graduate courses in digital logic design. This book is organized in such a way that that it can describe a number of RTL design scenarios, from simple to complex. The book constructs the logic design story from the fundamentals of logic design to advanced RTL design concepts. Keeping in view the importance of miniaturization today, the book gives practical information on the issues with ASIC RTL design and how to overcome these concerns. It clearly explains how to write an efficient RTL code and how to improve design performance. The book also describes advanced RTL design concepts such as low-power design, multiple clock-domain design, and SOC-based design. The practical orientation of the book makes it ideal for training programs for practicing design engineers and for short-term vocational programs. The contents of the book will also make it a useful read for students and hobbyists.

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