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Covers the methodology and state-of-the-art techniques of constrained verification, which is new and popular.§It relates constrained verification with the also-hot technology called assertion-based design.§Discussed and clarifies language issues, critical to both the above, which will help the implementation of these languages.Constraint-Based Verifcation covers the emerging field in functional verification of electronic designs thats is now commonly referred to by this name.§Topics are developed in the context of a wide range of dynamic and static verification approaches including stimulation, emulation and formal methods. The goal is to show how constraints, or assertions, can be used toward automating the generation of testbenches, resulting in a seamless verifcation flow. Topics such as verification coverage, and connection with assertion-based verification are also covered.§Constraint-Based Verification is written for verification engineers, as well as researchers - it explains both methodological and technical issues. Particular stress is given to the latest advances in functional verification.
