Architectures for Digital Signal Processing

Name: Architectures for Digital Signal Processing
Brand: John Wiley & Sons Inc
SKU: 9780470665442
Price: 596.1 RON
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Autor: Peter Pirsch, Holger Blume

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Editura: John Wiley & Sons Inc

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596.10 lei

This book addresses hardware architectures for implementations of Digital Signal Processing algorith...

Informații despre carte

Autor

Peter Pirsch, Holger Blume

Limbă

engleză

Legare

Carte - Copertă tare

Publicat

2024

Pagini

512

EAN

9780470665442

ISBN

0470665440

Enbook ID

01388704

Editura

John Wiley & Sons Inc

Dimensiuni

150 x 244 x 9

Descriere completă

This book addresses hardware architectures for implementations of Digital Signal Processing algorithms. Depending on software requirements, DSP may be implemented as dedicated hardware or as software programmable devices, and architectures for implementations of basic operations and basic functions are relevant for both implementation types. The mapping of signal processing algorithms onto specific array processors is covered, as are special applications digital filters and linear transforms. The architectures of programmable DSPs are integral to the book, and architectural measures to increase signal processing performance are explained. Both basic architectures of standard processors, and more specialist means such as SIMD, VLIW, and superscalar architectures are included. Significant developments in technology since the previous edition will receive particular focus: these include semiconductor technologies enabling the implementation of several programmable cores on one chip; multiprocessors with homogenous and heterogeneous structures; and Field Programmable Gate Arrays (FPGAs) allowing rapid prototyping. A concluding chapter looks at alternative DSP design styles (dedicated digital design, implementations using commercial DSP processors, application specific programmable processors, FPGA implementations) driven by application demands and implementation constraints.§The focus of the book is the transition of signal processing algorithms to hardware architectures for VLSI implementations.

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