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The size of technically producible integrated circuits increases continuously. But the ability to design and verify these circuits does not keep up with this development. Therefore today s design flow has to be improved to achieve a higher productivity. In Robustness and Usability in Modern Design Flows the current design methodology and verification methodology are analyzed, a number of deficiencies are identified and solutions suggested. Improvements in the methodology as well as in the underlying algorithms are proposed. §An in-depth presentation of preliminary concepts makes the book self-contained. Based on this foundation major design problems are targeted. In particular, a complete tool flow for Synthesis for Testability of SystemC descriptions is presented. The resulting circuits are completely testable and test pattern generation in polynomial time is possible. Verification issues are covered in even more detail. A whole new paradigm for formal design verification is suggested. This is based upon design understanding, the automatic generation of properties and powerful tool support for debugging failures. All these new techniques are empirically evaluated and experimental results are provided. §As a result, an enhanced design flow is created that provides more automation (i.e. better usability) and reduces the probability of introducing conceptual errors (i.e. higher robustness).VLSI CAD has greatly benefited from the use of reduced ordered Binary Decision Diagrams (BDDs) and the clausal representation as a problem of "Boolean Satisfiability" (SAT), e.g. in logic synthesis, verification or design-for-testability. In recent practical applications, BDDs are optimized with respect to new objective functions for design space exploration. The latest trends show a growing number of proposals to fuse the concepts of BDD and SAT.§Advanced BDD Optimization gives a modern presentation of the established as well as of recent concepts. Latest results in BDD optimization are given, covering different aspects of paths in BDDs and the use of efficient lower bounds during optimization. The presented algorithms include Branch and Bound and the generic A -algorithm as efficient techniques to explore large search spaces.§The A -algorithm originates from "Artificial Intelligence" (AI), and the EDA community has been unaware of this concept for a long time. Recently, the A -algorithm has been introduced as a new paradigm to explore design spaces in VLSI CAD. Besides AI search techniques, Advanved BDD Optimization also discusses the relation to another field of activity bordered to VLSI CAD and BDD optimization: the clausal representation as a SAT problem.§When regarding BDD optimization, mainly the minimization of diagram size was considered. The present book is the first to give a unified framework for the problem of BDD optimization and it presents the respective recent approaches. Moreover, the relation between BDD and SAT is studied in response to the questions that have emerged from the latest developments. This includes an analysis from a theoretical point of view as well as practical examples in formal equivalence checking. §Advanced BDD Optimization closes the gap between theory and practice by transferring the latest theoretical insights into practical applications. §In this, a solid, thorough analysis of the theory is presented, which is completed by experimental studies. The basic concepts of new optimization goals and the relation between the two paradigms BDD and SAT have been known and understood for a short time, and they will have wide impact on further developments in the field.
